1. Field of the Invention
The present invention relates generally to a lead-on-chip LOC semiconductor package and to a method for manufacturing such a package, and more particularly, it relates to a method for bonding a semiconductor chip to a lead frame in LOC type semiconductor packages using partially-cured polyimide.
2. Description of the Related Art
The electronic industry continues to develop more compact semiconductor packages to keep pace with the trend toward reduction in size and weight of electronic products and appliances. However, surface mount packages using a lead frame to support semiconductor chips as well as to provide an electrical connection between the chips and external systems have an inherent limitation on size reduction, namely a space which corresponds to the thickness of the lead frame that should be provided between the die pads and the leads. Therefore, in practice, the maximum size of a chip which can be mounted in a package is about 70% of the width of the package.
To avoid this limitation, new chip mount technologies have been proposed. Among others, one example is LOC technology in which a chip is directly attached to leads.
A conventional LOC type semiconductor package is depicted in FIGS. 1 and 2. FIG. 1 is a plan view showing a conventional LOC type semiconductor chip package device; and FIG. 2 is a cross-sectional view depicting the bonding of a semiconductor chip to a lead frame according to one embodiment of a conventional LOC type semiconductor package.
With reference to FIG. 1, a LOC type semiconductor package 100 includes a chip 10 attached to the lower surface of leads 22 of a lead frame 20 by way of a double-sided adhesive polyimide tape 60 interposed therebetween. Bonding pads 12 on the chip 10 are electrically connected to respective corresponding leads 22 through gold wires 30. The leads 22, the chip 10, tie bars 24 and the electrical connections are encapsulated with a molding resin to provide a package body 40.
A double-sided adhesive tape 60 includes a polyimide tape 62 with an adhesive 64, 66 on both sides. The double-sided adhesive polyimide tape 60 is bonded to the lower surface of the leads 22 on one side thereof and is bonded to the upper surface of the chip 10 on the other side thereby attaching the chip 10 to the leads 22 via the tape 60.
An advantage of using a double-sided adhesive polyimide tape in fabricating LOC type semiconductor packages is that the tape can absorb stress when the chip 10, lead frame 22 and tape 60 are assembled as shown in FIG. 2 and compressed using a press during to bond the lead frame 22 to the chip 10 during the manufacturing process. The chip 10 has a polyimide coating 50 on its upper surface to prevent chip 10 from being damaged when the lead frame is bonded to the chip.
The double-sided adhesive polyimide tape 60 is not easy to handle since it is adhesive on both sides. It is also expensive. Moreover, since the number of interfaces in the package device increases, package failures such as cracks or a debonding between the interfaces may increase, resulting in a reduction in package reliability.
To address some of the problems associated with adhesive tape, chip 10 was coated with polyimide coating 50 and directly bonded to leads 22 using an adhesive 70 as shown in FIG. 3. In this case, however, a greater stress is applied on the chip 10 during the bonding process than the case where a double-sided adhesive tape is used, resulting in a higher possibility of causing damage to chip 10.
Therefore, there has been a need to provide a method for bonding a semiconductor chip to a lead frame in an LOC type semiconductor package which allows a reduction of the number of interfaces and of the stress applied on the chip, and a curtailment of the production cost.